sjg/trx-rs
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

[fix](trx-rds): revert RRC span to 10 chips to restore stopband rejection

Browse Source 
The span-5 reduction passed synthetic tests because both the TX and RX
filters used the same truncated pulse shape (perfect matched filtering).
On real signals, the transmitter uses a full RRC pulse, and our truncated
RX filter couldn't match it — the weaker stopband rejection (~25% less
than pre-TED at α=0.30) allowed adjacent-channel interference through,
degrading soft confidence values and block decode rate, which caused
poor PS accumulation.

Span 10 at α=0.30 gives 50% better stopband rejection than the pre-TED
α=0.50/span=4 configuration, at the cost of 2048 vs 1024 FFT size.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
Signed-off-by: Stan Grams <sjg@haxx.space>

https://claude.ai/code/session_01Sw9esAuic8KHP1t8nZgvH2
Signed-off-by: Claude <noreply@anthropic.com>
This commit is contained in:
Claude
2026-03-27 15:09:49 +00:00
committed by Stan Grams
parent c92e53c3d3
commit dd1af5aa94
1 changed files with 8 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files
src/decoders/trx-rds/src/lib.rs
+8 -6
View File
@@ -69,12 +69,14 @@ const COSTAS_LOCK_THRESHOLD: f32 = 0.15;
/// sensitivity gain. The tighter excess bandwidth is handled by the longer /// sensitivity gain. The tighter excess bandwidth is handled by the longer
/// RRC_SPAN_CHIPS to keep ISI negligible. /// RRC_SPAN_CHIPS to keep ISI negligible.
const RRC_ALPHA: f32 = 0.30; const RRC_ALPHA: f32 = 0.30;
/// Tech 1 — RRC filter span in chips. 5 chips captures >95% of the RRC /// Tech 1 — RRC filter span in chips. 10 chips captures the full RRC
/// pulse energy at α=0.30 (first zero at t≈1.43 chips, sidelobes beyond /// pulse including low-level sidelobes, keeping stopband leakage below
/// ±2.5 chips contribute <5% energy) while keeping the FFT overlap-save /// −60 dB — critical for rejecting adjacent-channel interference on real
/// block size at 512 and FFT size at 1024 — matching the pre-TED filter /// signals where α is small. The extra taps (vs span 5) increase FFT
/// efficiency. Added latency is ~2.1 ms at 2375 chips/s, negligible for RDS. /// size from 1024 to 2048 but the improved stopband rejection translates
const RRC_SPAN_CHIPS: usize = 5; /// directly into better block decode rate on weak, noisy signals.
/// Added latency is ~4.2 ms at 2375 chips/s, negligible for RDS.
const RRC_SPAN_CHIPS: usize = 10;
/// Staleness timeout in seconds. If the incumbent candidate has not produced /// Staleness timeout in seconds. If the incumbent candidate has not produced
/// a state update in this many seconds, its score advantage is cleared so any /// a state update in this many seconds, its score advantage is cleared so any
/// candidate can take over. Prevents the decoder from "freezing" when the /// candidate can take over. Prevents the decoder from "freezing" when the