[fix](trx-backend-soapysdr): disable hidden AIS DSP outside AIS modes
Add per-channel processing gating and disable hidden AIS channel DSP unless mode is AIS or MARINE, reducing continuous IQ read-loop CPU load in normal operation.\n\nCo-authored-by: OpenAI Codex <codex@openai.com> Signed-off-by: Stan Grams <sjg@haxx.space>
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@@ -86,6 +86,7 @@ pub struct ChannelDsp {
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iq_agc: Option<SoftAgc>,
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iq_agc: Option<SoftAgc>,
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audio_agc: SoftAgc,
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audio_agc: SoftAgc,
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audio_dc: Option<DcBlocker>,
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audio_dc: Option<DcBlocker>,
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processing_enabled: bool,
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}
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}
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impl ChannelDsp {
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impl ChannelDsp {
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@@ -262,9 +263,14 @@ impl ChannelDsp {
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iq_agc: iq_agc_for_mode(mode, channel_sample_rate),
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iq_agc: iq_agc_for_mode(mode, channel_sample_rate),
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audio_agc: agc_for_mode(mode, audio_sample_rate),
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audio_agc: agc_for_mode(mode, audio_sample_rate),
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audio_dc: dc_for_mode(mode),
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audio_dc: dc_for_mode(mode),
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processing_enabled: true,
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}
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}
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}
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}
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pub fn set_processing_enabled(&mut self, enabled: bool) {
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self.processing_enabled = enabled;
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}
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pub fn set_mode(&mut self, mode: &RigMode) {
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pub fn set_mode(&mut self, mode: &RigMode) {
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self.mode = mode.clone();
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self.mode = mode.clone();
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if *mode != RigMode::WFM {
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if *mode != RigMode::WFM {
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@@ -325,6 +331,9 @@ impl ChannelDsp {
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}
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}
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pub fn process_block(&mut self, block: &[Complex<f32>]) {
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pub fn process_block(&mut self, block: &[Complex<f32>]) {
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if !self.processing_enabled {
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return;
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}
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let n = block.len();
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let n = block.len();
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if n == 0 {
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if n == 0 {
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return;
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return;
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@@ -227,7 +227,7 @@ impl SoapySdrRig {
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let spectrum_buf = pipeline.spectrum_buf.clone();
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let spectrum_buf = pipeline.spectrum_buf.clone();
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let retune_cmd = pipeline.retune_cmd.clone();
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let retune_cmd = pipeline.retune_cmd.clone();
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Ok(Self {
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let rig = Self {
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info,
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info,
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freq: initial_freq,
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freq: initial_freq,
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mode: initial_mode,
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mode: initial_mode,
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@@ -245,7 +245,9 @@ impl SoapySdrRig {
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gain_db,
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gain_db,
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max_gain_db,
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max_gain_db,
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ais_channel_indices: Some((primary_channel_count, primary_channel_count + 1)),
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ais_channel_indices: Some((primary_channel_count, primary_channel_count + 1)),
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})
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};
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rig.apply_ais_channel_activity();
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Ok(rig)
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}
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}
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/// Simple constructor for backward compatibility with the factory function.
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/// Simple constructor for backward compatibility with the factory function.
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@@ -300,6 +302,18 @@ impl SoapySdrRig {
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}
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}
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}
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}
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fn apply_ais_channel_activity(&self) {
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let Some((ais_a_idx, ais_b_idx)) = self.ais_channel_indices else {
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return;
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};
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let enabled = matches!(self.mode, RigMode::AIS | RigMode::MARINE);
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for idx in [ais_a_idx, ais_b_idx] {
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if let Some(dsp_arc) = self.pipeline.channel_dsps.get(idx) {
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dsp_arc.lock().unwrap().set_processing_enabled(enabled);
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}
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}
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}
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pub fn subscribe_iq_channel(
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pub fn subscribe_iq_channel(
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&self,
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&self,
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channel_idx: usize,
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channel_idx: usize,
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@@ -435,6 +449,7 @@ impl RigCat for SoapySdrRig {
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dsp.set_mode(&mode);
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dsp.set_mode(&mode);
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dsp.set_filter(self.bandwidth_hz, self.fir_taps as usize);
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dsp.set_filter(self.bandwidth_hz, self.fir_taps as usize);
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}
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}
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self.apply_ais_channel_activity();
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self.apply_ais_channel_filters();
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self.apply_ais_channel_filters();
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Ok(())
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Ok(())
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})
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})
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